The present invention relates to methods and apparatus for reducing power consumption in multiprocessor systems. In particular, power consumption may be reduced by reducing an operating frequency of a processor in a loop cycle.
In recent years, there has been an insatiable desire for faster computer processing data throughputs because cutting-edge computer applications involve real-time, multimedia functionality. Graphics applications are among those that place the highest demands on a processing system because they require such vast numbers of data accesses, data computations, and data manipulations in relatively short periods of time to achieve desirable visual results. These applications require extremely fast processing speeds, such as many thousands of megabits of data per second. While some processing systems employ a single processor to achieve fast processing speeds, others are implemented utilizing multi-processor architectures. In multi-processor systems, a plurality of sub-processors can operate in parallel (or at least in concert) to achieve desired processing results.
For example, a multi-processor system may include a plurality of processors all sharing a common system memory, where each processor also has a local memory in which to execute instructions. The multi-processor system may also include an external interface, for example, to connect with other processing systems and/or other external devices to permit the sharing of data and resources. While this can achieve significant benefits in functionality, processing power, etc., the design of such systems may aggravate the problem of power consumption in some circumstances. The amount of power consumed depends not only on the number of processors in use, but also on the speed, or frequency, at which the processors are operating.
Power dissipation and the resulting battery usage may be a problem in a multiprocessing system employing a plurality of processors, particularly where the processors are running at high frequencies, such as 4 GHz or more. While faster processor frequencies are generally desirable, they have the undesirable effect of increasing power consumption. Due in part to a high operating frequency, a processor may consume undesirably high amounts of power even when waiting on other processors.
It would therefore be desirable to reduce power consumption by processors waiting on other devices.